MaxLinear XRT8000ID-F

The XRT8000 is a dual phase-locked loop chip that generates two simultaneous, very low jitter, output clocks for synchronization applications in wide area networking systems. The outputs are phase locked to the input signal. The chip has four basic modes of operation; referred to as master (FORWARD, REVERSE) and slave (FORWARD, REVERSE) modes. In the FORWARD mode it accepts up to 16th harmonic of either 1.544MHz or 2.048MHz as input reference and generates 1.2kHz and multiples of 2.4kHz, 56kHz or 64kHz. In the REVERSE mode an input clock of 56kHz or 64kHz is used to generate 1.544MHz or 2.048MHz output clocks. The SLAVE (FORWARD, REVERSE) modes generate the same output frequencies as the MASTER (FORWARD/ REVERSE MODES) except that the input frequency (F_IN) is 8kHz. An optional divide by eight can be enabled at each of the outputs. The input and output frequency selection can be done through a serial microprocessor interface. The XRT8000 is available in either 18 pin SOIC package or 18 pin plastic DIP.

• Clock Adaptation for Most Popular Telecommunication Frequencies
• Wide Input Frequency Range Programmable Output Frequencies
• Less than 0.05UI Wide Band Output Jitter
• Low Power Operation (5V and 3.3V)
• Maximum Lock Time of 45mS
• Cascadable
• No External Components Needed
• Lock Detect Indication Pin

• DSU’s, CSU’s and Access Equipment
• ISDN Terminals
• Concentrators and Multiplexers