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SILICON LABS SI5338C-B11022-GM product image
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SILICON LABS SI5338C-B11022-GM

Manufacturer
MPN
SI5338C-B11022-GM
LCSC Part #
C1137269
Packaging
QFN-24-EP(4x4)
Customer #
Key Attributes
QFN-24-EP(4x4) Application Specific Clock/Timing
DatasheetSILICON LABS SI5338C-B11022-GM
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement
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QtyUnit Price(Reference Only)Total Amount
1+$ 17.7376$ 17.74
200+$ 6.8639$ 1372.78
500+$ 6.6231$ 3311.55
1,000+$ 6.5042$ 6504.20
Standard Packaging75/Full Tray
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Products Specifications

All
TypeDescription
CategoryIntegrated Circuits (ICs)/Clock/Timing/Application Specific Clock/Timing
ManufacturerSILICON LABS
PackagingQFN-24-EP(4x4)

Introduction

AI Translation

The Si512/513 dual frequency XO utilizes advanced PLL technology to provide any frequency from 100 kHz to 250 MHz. It uses one fixed crystal and proprietary any-frequency synthesizer to generate any frequency across this range. This IC-based approach allows the crystal resonator to provide enhanced reliability, improved mechanical robustness, and excellent stability. In addition, this solution provides superior supply noise rejection, simplifying low jitter clock generation in noisy environments. The Si512/513 is factory-configurable for a wide variety of user specifications, including frequency, supply voltage, output format, output enable polarity, and stability. Specific configurations are factory-programmed at time of shipment, eliminating long lead times and non-recurring engineering charges associated with custom frequency oscillators.

Features

AI Translation
  • Supports any frequency from 100 kHz to 250 MHz
  • Two selectable output frequencies
  • Low-jitter operation
  • 2 to 4 week lead times
  • Total stability includes 10-year aging
  • Comprehensive production test coverage includes crystal ESR and DLD
  • On-chip LDO regulator for power supply noise filtering

Applications

AI Translation
  • SONET/SDH/OTN
  • Gigabit Ethernet
  • Fibre Channel/SAS/SATA
  • PCI Express
  • Broadcast video
  • Switches/routers
  • Telecom
  • FPGA/ASIC clock generation