RENESAS R7FA4M3AD3CFB#AA0

The MCU integrates multiple series of software- and pin-compatible Arm-based 32-bit cores that share a common set of Renesas peripherals to facilitate design scalability and efficient platform-based product development. The MCU in this series incorporates a high-performance Arm Cortex-M33 core running up to 100 MHz with the following features: Up to 1 MB code flash memory ● 128 KB SRAM ● Quad Serial Peripheral Interface (QSPI) ● USBFS, SD/MMC Host Interface ● Capacitive Touch Sensing Unit (CTSU) ● Analog peripherals Security and safety features

• Arm Cortex-M33 Core
  • Armv8-M architecture with the main extension
  • Maximum operating frequency: 100 MHz
  • Arm Memory Protection Unit (Arm MPU) – Protected Memory System Architecture (PMSAv8) – Secure MPU (MPU_S): 8 regions – Non-secure MPU (MPU_NS): 8 regions
  • SysTick timer – Embeds two Systick timers: Secure and Non-secure instance – Driven by LOCO or system clock
  • CoreSight ETM-M33
• Memory
  • Up to 1-MB code flash memory
  • 8-KB data flash memory (100,000 program/erase (P/E) cycles)
  • 128-KB SRAM
• Connectivity
  • Serial Communications Interface (SCI)×6 – Asynchronous interfaces – 8-bit clock synchronous interface – Smart card interface – Simple IIC – Simple SPI – Manchester coding (SCI3, SCI4)
  • I²C bus interface (IIC)×2
  • Serial Peripheral Interface (SPI)
  • Quad Serial Peripheral Interface (QSPI)
  • USB 2.0 Full-Speed Module (USBFS)
  • Control Area Network module (CAN)×2
  • SD/MMC Host Interface (SDHI)
  • Serial Sound Interface Enhanced (SSIE)
• Analog
  • 12-bit A/D Converter (ADC12)×2 – 5 Msps at interleaving
  • 12-bit D/A Converter (DAC12)×2
  • Temperature Sensor (TSN)
• Timers
  • General PWM Timer 32-bit (GPT32)×4
  • General PWM Timer 16-bit (GPTl6)×4
  • Low Power Asynchronous General Purpose Timer (AGT)×6
• Security and Encryption
  • Secure Crypto Engine 9 – Symmetric algorithms: AES – Asymmetric algorithms: RSA, ECC, and DSA – Hash-value generation: SHA224, SHA256, GHASH – 128-bit unique ID
• System and Power Management
  • Low power modes
  • Battery backup function (VBATT)
  • Realtime Clock (RTC) with calendar and VBATT support
  • Event Link Controller (ELC)
  • Data Transfer Controller (DTC)
  • DMA Controller (DMAC)×8
  • Power-on reset
  • Low Voltage Detection (LVD) with voltage settings
  • Watchdog Timer (WDT)
  • Independent Watchdog Timer (IWDT)
• Human Machine Interface (HMI)
  • Capacitive Touch Sensing Unit (CTSU)
• Multiple Clock Sources
  • Main clock oscillator (MOSC) (8 to 24 MHz)
  • Sub-clock oscillator (SOSC) (32.768 kHz)
  • High-speed on-chip oscillator (HOCO) (16/18/20 MHz)
  • Middle-speed on-chip oscillator (MOCO) (8 MHz)
  • Low-speed on-chip oscillator (LOCO) (32.768 kHz)
  • IWDT-dedicated on-chip oscillator 15 kHz
  • Clock trim function for HOCO/MOCO/LOCO
  • PLL/PLL2
  • Clock out support
• General-Purpose I/O Ports
  • 5-V tolerance, open drain, input pull-up, switchable driving ability
• Operating Voltage
  • VCC: 2.7 to 3.6 V
• Operating Temperature and Packages
  • Ta = -40℃ to +105℃
  • 144-pin LQFP (20 mm×20 mm, 0.5 mm pitch)
  • 100-pin LQFP (14 mm×14 mm, 0.5 mm pitch)
  • 64-pin LQFP (10 mm×10 mm, 0.5 mm pitch)
  • 144-pin BGA (7 mm×7 mm, 0.50 mm pitch)
  • 64-pin BGA (6 mm×6 mm, 0.65 mm pitch)