Infineon/CYPRESS CY2SSTV857ZC-27

CY2SSTV857-27 is a high-performance, low-skew, low-jitter zero-delay buffer designed for distributing differential clocks in high-speed applications. The CY2SSTV857-27 generates ten differential pair clock outputs from a single differential pair clock input. In addition, the CY2SSTV857-27 features differential feedback clock outputs and inputs, enabling it to be used as a zero-delay buffer. When used as a zero-delay buffer in a nested clock tree, the CY2SSTV857-27 locks to the input reference and translates to low-skew outputs with near-zero delay.

• Operating frequency: 60 MHz to 200 MHz, supports 266 and 333 MHz DDR SDRAM
• Generates 10 differential outputs from 1 differential input
• Spread spectrum support
• Low jitter (cycle-to-cycle): < 75 ps
• Ultra-low skew: < 100 ps
• Power management control input; outputs enter high-impedance state when input clock < 10 MHz; 2.5V supply voltage
• Pin-compatible with CDC857-2 and -3; 48-pin TSSOP package
• Industrial temperature range: -40°C to +85°C
• JEDEC DDR specification compliant