Infineon/CYPRESS CY8C4024FNI-S402T

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC™ 4000S product family is a member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC™ 4000S products are upward compatible with members of the PSoC™ 4 platform for new applications and design needs.

• 32-bit MCU subsystem - 48-MHz Arm® Cortex®-M0+ CPU with single-cycle multiply - Up to 32 KB of flash with read accelerator - Up to 4 KB of SRAM
• Programmable analog - Single-slope 10-bit ADC function provided by Capacitance sensing block - Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin - Two low-power comparators that operate in Deep Sleep low-power mode
• Programmable digital - Programmable logic blocks allowing boolean operations to be performed on port inputs and outputs
• Low-power 1.71-V to 5.5-V operation - Deep Sleep mode with operational analog and 2.5 μA digital system current
• Capacitive sensing: Capacitive sigma-delta provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance; Infineon-supplied software component makes capacitive sensing design easy; Automatic hardware tuning (SmartSense)
• LCD drive capability - LCD segment drive capability on GPIOs
• Serial communication: Two independent run-time reconfigurable serial communication blocks (SCBs) with re-configurable I²C, SPI, or UART functionality
• Timing and pulse-width modulation - Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks - Center-aligned, edge, and pseudo-random modes - Comparator-based triggering of kill signals for motor drive and other high-reliability digital logic applications
• Up to 36 programmable GPIO pins: 48-pin TQFP, 40-pin QFN, 32-pin QFN, 24-pin QFN, 32-pin TQFP, and 25-ball WLCSP packages; Any GPIO pin can be CAPSENSE™, analog, or digital; Drive modes, strengths, and slew rates are programmable
• Clock sources - 32-kHz watch crystal oscillator (WCO) - ±2% internal main oscillator (IMO) - 32-kHz internal low-power oscillator (ILO)
• PSoC™ Creator design environment: Integrated development environment (IDE) provides schematic design entry and build, with analog and digital automatic routing; Application programming interface (API) components for all fixed-function and programmable peripherals
• Industry-standard tool compatibility - After schematic entry, development can be done with Arm®-based industry-standard development tools