Advanced Linear Devices ALD555SAL
| 제조업체 | |
| 제조사 품번 | ALD555SAL |
| LCSC 번호 | C6123496 |
| 포장 | SOIC-8 |
| 고객 번호 | |
| 주요 제원 | SOIC-8 Programmable Timers and Oscillators RoHS |
| 데이터시트 | Advanced Linear Devices ALD555SAL |
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators | |
| 제조업체 | Advanced Linear Devices | |
| 포장 | SOIC-8 | |
| Features | Adjustable duty cycle oscillation;Reset function |
| 타입 | 설명 | |
|---|---|---|
| 포장 | SOIC-8 | |
| Features | Adjustable duty cycle oscillation;Reset function |
개요
The ALD555 timer is a high performance monolithic timing circuit built with advanced silicon gate CMOS technology. It offers the benefits of high input impedance, thereby allowing smaller timing capacitors and longer timing cycle; high speed, with typical cycle time of 500ns; low power dissipation for battery operated environment; reduced supply current spikes, allowing smaller and lower cost decoupling capacitors. It is capable of producing accurate time delays and oscillations in both monostable and astable operation. It operates in the one-shot (monostable) mode or 50% duty cycle free running oscillation mode with a single resistor and one capacitor. The inputs and outputs are fully compatible with CMOS, NMOS or TTL logic. There are three matched internal resistors (approximately 200KΩ each) that set the threshold and trigger levels at two-thirds and one-third respectively of V+. These levels can be adjusted by using the control terminal (pin 5). When the trigger input is below the trigger level, the output is in the high state and sourcing 2mA. When threshold input is above the threshold level at the same time the trigger input is above the trigger level, the internal flip-flop is reset, the output goes to the low state and sinks up to 10mA. The reset input overrides all other inputs and when it is active (reset voltage less than 1V), the output is in the low state.
주요 특징
- Functional equivalent to NE555 with greatly expanded high and low frequency ranges
- High speed, low power, monolithic CMOS technology
- High speed operation -- 2MHz oscillation
- Low operating supply voltage of 2 to 12V
- Operates in both monostable and astable modes
- Fixed 50% duty cycle or adjustable duty cycle
- CMOS, NMOS and TTL compatible input/output
- High discharge sinking current of 80mA
- Low supply current spikes
- High speed one-shot (monostable) pulse generation
- Precision timing
- Sequential timing
- Long delay timer
- Pulse width and pulse position modulation
- Missing pulse detector
- Frequency divider
- Low supply current: 100μA typical
- Extremely low trigger, threshold and reset currents: 1pA typical
| 수량 | 단가(참고용) | 총액 |
|---|---|---|
| 1+ | $ 2.8852 | $ 2.89 |
| 200+ | $ 1.1517 | $ 230.34 |
| 500+ | $ 1.1138 | $ 556.90 |
| 1,000+ | $ 1.0941 | $ 1094.10 |
표준 패키지50/Full Tube | ||
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Clock/Timing/Programmable Timers and Oscillators | |
| 제조업체 | Advanced Linear Devices | |
| 포장 | SOIC-8 | |
| Features | Adjustable duty cycle oscillation;Reset function |
| 타입 | 설명 | |
|---|---|---|
| 포장 | SOIC-8 | |
| Features | Adjustable duty cycle oscillation;Reset function |
개요
The ALD555 timer is a high performance monolithic timing circuit built with advanced silicon gate CMOS technology. It offers the benefits of high input impedance, thereby allowing smaller timing capacitors and longer timing cycle; high speed, with typical cycle time of 500ns; low power dissipation for battery operated environment; reduced supply current spikes, allowing smaller and lower cost decoupling capacitors. It is capable of producing accurate time delays and oscillations in both monostable and astable operation. It operates in the one-shot (monostable) mode or 50% duty cycle free running oscillation mode with a single resistor and one capacitor. The inputs and outputs are fully compatible with CMOS, NMOS or TTL logic. There are three matched internal resistors (approximately 200KΩ each) that set the threshold and trigger levels at two-thirds and one-third respectively of V+. These levels can be adjusted by using the control terminal (pin 5). When the trigger input is below the trigger level, the output is in the high state and sourcing 2mA. When threshold input is above the threshold level at the same time the trigger input is above the trigger level, the internal flip-flop is reset, the output goes to the low state and sinks up to 10mA. The reset input overrides all other inputs and when it is active (reset voltage less than 1V), the output is in the low state.
주요 특징
- Functional equivalent to NE555 with greatly expanded high and low frequency ranges
- High speed, low power, monolithic CMOS technology
- High speed operation -- 2MHz oscillation
- Low operating supply voltage of 2 to 12V
- Operates in both monostable and astable modes
- Fixed 50% duty cycle or adjustable duty cycle
- CMOS, NMOS and TTL compatible input/output
- High discharge sinking current of 80mA
- Low supply current spikes
- High speed one-shot (monostable) pulse generation
- Precision timing
- Sequential timing
- Long delay timer
- Pulse width and pulse position modulation
- Missing pulse detector
- Frequency divider
- Low supply current: 100μA typical
- Extremely low trigger, threshold and reset currents: 1pA typical
C6123496 EasyEDA 라이브러리
컴플라이언스 & 수출 코드
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | EAR99 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| 타입 | 세부사항 |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |

