LCSC Electronics logoLCSC Electronics svg logo
로그인
USD

TI DS90LV019TMX/NOPB

제조업체
제조사 품번
DS90LV019TMX/NOPB
LCSC 번호
C2671167
포장
SOIC-14
고객 번호
주요 제원
DS90LV019 3.3V or 5V LVDS Driver/Receiver
데이터시트TI DS90LV019TMX/NOPB
RoHS 준수2개 문서 이용 가능
대체 부품5
모든 주문 보장
100% 정품 · 30일 반품 또는 교환

제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers
제조업체TI
포장SOIC-14
TypeTransceiver
Voltage - Supply3.3V;5V
Data Rate100Mbps
Operating Temperature-40℃~+85℃
Number of Drivers1
FeaturesFail-safe;Hot-plug / power-up glitch-free
Level StandardLVDS
Number of Receivers1
도움말 및 피드백유사 제품 보기 (0) >

개요

AI 번역

The DS90LV019 is a Driver/Receiver designed specifically for the high speed low power point- to- point interconnect applications. The device operates from a single 3.3V or 5.0V power supply and includes one differential line driver and one receiver. The DS90LV019 features an independent driver and receiver with TTL/CMOS compatibility (DIN and ROUT). The logic interface provides maximum flexibility as 4 separate lines are provided (DIN,DE, RE, and ROUT). The device also features a flow- through pin out which allows easy PCB routing for short stubs between its pins and the connector. The driver has 3.5mA output loop current. The driver translates between TTL levels (single- ended) to Low Voltage Differential Signaling levels. This allows for high speed operation, while consuming minimal power with reduced EMI. In addition, the differential signaling provides common- mode noise rejection. The receiver threshold is ±100mV over a ±1V commonmode range and translates the low swing differential levels to standard (TTL/CMOS) levels.

주요 특징

AI 번역
  • LVDS Signaling
  • 3.3V or 5.0V operation
  • Low power CMOS design
  • Balanced Output Impedance
  • Glitch free power up/down (Driver disabled)
  • High Signaling Rate Capacity (above 100 Mbps)
  • Ultra Low Power Dissipation
  • ±1V Common- Mode Range
  • ±100mV Receiver Sensitivity
  • Product offered in SOIC and TSSOP packages
  • Flow- Through Pin Out
  • Industrial Temperature Range Operation

응용 분야

AI 번역
  • High-speed, low-power point-to-point interconnect transmission applications
  • LVDS circuit design recommendation: Use at least a 4-layer PCB with dedicated layers for LVDS signals, ground, power, and TTL signals
  • LVDS circuit design recommendation: Place drivers and receivers as close as possible to the LVDS port-side connectors
  • LVDS circuit design recommendation: Each device requires bypass capacitors combined with distributed bulk capacitors; recommended to place 0.1μF and 0.01μF multilayer ceramic SMT capacitors in parallel between each power pin and ground, positioned as close to the power pins as possible