Zilog Z53C8003ASG

The Z53C80 SCSI (Small Computer System Interface) controller is a 44-pin PLCC, or 48-pin DIP CMOS device. It is designed to implement the SCSI protocol as defined by the ANSI x3.131-1986 standard, and is fully compatible with the industry standard 5380. It is capable of operating both as a target and as an initiator. Special high-current open-drain outputs enable it to directly interface to the SCSI bus. The Z53C80 has the necessary interface hookups so the system CPU can communicate with it as with any other peripheral device. The CPU can read from, or write to, the SCSI registers which are addressed as standard or memory-mapped I/Os. The Z53C80 increases the system performance by minimizing the CPU intervention in DMA operations which the SCSI controls. The CPU is interrupted by the SCSI when it detects a bus condition that requires attention. It also supports arbitration and reselection. The Z53C80 has the proper handshake signals to support normal and block mode DMA operations with most DMA controllers available. The added enhancement known as the “Glitch Eater” is used to minimize effects of bus reflection on improperly terminated SCSI bus applications. The high frequency reflections that can occur on the SCSI bus are filtered out, reducing the sensitivity of the inputs, specifically /REQ and /ACK to bus signal reflections.

• DMA or programmed I/O data transfers
• Arbitration support
• Supports normal or block mode DMA
• Memory or I/O mapped CPU interface
• Asynchronous interface, supports 3 Mbytes/sec
• Direct SCSI bus interface with on-board 48mA drivers
• Supports target and initiator roles
• Meets SCSI protocol as defined in ANSI X3.131-1986 standard
• Added "Glitch Eater" enhancement to minimize bus reflection