RENESAS 8T73S1802NLGI

The 8T73S1802 is a fully integrated clock fanout buffer and frequency divider. The input signal is frequency-divided and distributed to one differential LVPECL output and one LVCMOS output. Each output can independently select its division ratio from ÷1, ÷2, ÷4, and ÷8. Three control inputs — EN, SEL0, and SEL1 (tri-state logic) — are used to select the frequency division ratio and enable/disable each output. The single-ended LVCMOS output is phase-delayed by 650ps to minimize coupling from LVCMOS switching to the differential output during signal transitions.

• High-performance fanout buffer clock and fanout buffer
• Input clock signal distributed to one LVPECL output and one LVCMOS output
• Configurable divider on both LVPECL and LVCMOS outputs
• Supports clock frequencies up to 1000MHz (LVPECL) and 200MHz (LVCMOS)
• Flexible differential input supporting LVPECL, LVDS, and CML
• VBB generator output supports single-ended input signal applications
• Optimized for low phase noise
• 650ps delay between LVCMOS and LVPECL minimizes inter-output coupling
• Supply voltage: 3.3V or 2.5V
• Operating temperature range: -40℃ to 85℃
• 16 VFQFPN package (3x3 mm)

• Wireless infrastructure
• Telecommunications
• Network terminal equipment