Infineon/CYPRESS S25FL256LDPNFN013

The Cypress FL-L Family devices are Flash non-volatile memory products using Floating Gate technology 65 nm process lithography. The FL-L family connects to a host system via a Serial Peripheral Interface (SPI). Traditional SPI single bit serial input and output (Single I/O or SIO) is supported as well as optional two bit (Dual I/O or DIO) and four bit wide Quad I/O (QIO) and Quad Peripheral Interface (QPI) commands. In addition, there are Double Data Rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The architecture features a Page Programming Buffer that allows up to 256-bytes to be programmed in one operation and provides individual 4KB sector, 32KB half block, 64KB block, or entire chip erase. By using FL-L family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous, NOR Flash memories, while reducing signal count dramatically. The FL-L family products offer high densities.

• Serial Peripheral Interface (SPI) with Multi-I/O – Clock polarity and phase modes 0 and 3 – Double Data Rate (DDR) option – Quad peripheral Interface (QPI) option – Extended Addressing: 24- or 32-bit address options – Serial Command subset and footprint compatible with S25FL-A, S25FL1-K, S25FL-P, S25FL-S and S25FS-S SPI families – Multi I/O Command subset and footprint compatible with S25FL-P, S25FL-S and S25FS-S SPI families
• Read
  • Commands: Normal, Fast, Dual I/O, Quad I/O, DualO, QuadO, DDR Quad I/O.
  • Modes: Burst Wrap, Continuous (XIP), QPI
  • Serial Flash Discoverable Parameters (SFDP) for configuration information.
• Program Architecture – 256 Bytes Page Programming buffer3.0 V FL-L Flash Memory – Program suspend and resume
• Erase Architecture – Uniform 4KB Sector Erase – Uniform 32KB Half Block Erase – Uniform 64KB Block Erase – Chip erase – Erase suspend and resume
• 20 Year Data Retention, typical
• Security features – Status and Configuration Register Protection – Four Security Regions of 256 bytes each outside the main Flash array – Legacy Block Protection: Block range Individual and Region Protection – Individual Block Lock: Volatile individual Sector/Block – Pointer Region: Non-Volatile Sector/Block range – Power Supply Lock-down, Password, or Permanent protection of Security Regions 2 and 3 and Pointer Region
• Technology - 65 nm Floating Gate Technology
• Single Supply Voltage with CMOS I/O - 2.7 V to 3.6 V
• Temperature Range – Industrial (-40℃ to +85℃) – Industrial Plus (-40℃ to +105℃) – Extended ( -40℃ to +125℃)
• Packages (all Pb-free) – WSON 6x8 mm (WNH008) – 16-pin SOIC 300 mil (SO3016) – BGA-24 6x8 mm – 5x5 ball (FAB024) footprint – 4x6 ball (FAC024) footprint