Fuji Electric MB86R01PB-GSE1

MB86R01 is LSI product for the graphics applications with ARM Limited's CPU ARM926EJ-S and Fujitsu's GDC MB86296 as its core. This product contains peripheral I/O resources, such as in-vehicle LAN, HDD, and USB; therefore only a single chip of MB86R01 controls main graphics application system which usually requires 2 chips (CPU and GDC.)

• CMOS 90nm technology
• Package: PBGA484
• Power-supply voltage: (IO: 3.3±0.3V, core: 1.2±0.1V, DDR2: 1.8±0.1V)
• Operation frequency: 333MHz (CPU), 83MHz (AHB), 41.5MHz (APB)
• CPU core: ARM926EJ-S, 16KB instruction cache/16KB data cache, 16KB ITCM/16KB DTCM, ETM9CS Single and JTAG ICE interface, Java acceleration (Jazelle technology)
• Bus architecture: Multi-layer AHB bus architecture
• Interrupt
• Built-in SRAM
• Clock/Reset control function
• Remap/Boot control function
• 16 bit external bus interface with decoding engine
• 32 bit DDR2 memory interface (target: 166MHz: 333Mbps)
• Graphics display controller: 2D/3D rendering engine of Fujitsu MB86296, RGB66 video output × 1 ch (extensible to RGB888 with using option I/O), ITU RBT-656 video capture × 1 ch (extensible to RGB666 with using option I/O)
• USB 2.0 host (HS/FS protocols) × 1ch
• IDE66 (ATA/ATAPI-5) × 1ch
• SD memory interface (SDIO/CPRM: unsupported) × 1ch
• 10 bit A/D converter (1MS/s) × 2ch
• I²C (I/O voltage: 3.3V) × 2ch
• UART × 3ch (extensible up to 6ch with using option I/O)
• 32/16 bit timer × 2 ch
• DMAC × 8ch
• Option I/O (with pin multiplex): RGB666 video output is extensible to 2ch, Video capture is extensible to 2ch, MediaLB (MOST50) × 1 cl is addable, CAN (I/O voltage: 3.3V) × 2ch is addable, USB 2.0 function (HS/FS protocols) is switchable (USB 2.0 function and USB 2.0 host are accessed exclusively), GPIO is addable up to 24, SPI × 1ch is addable, PWM × 2ch is addable, I2S is addable up to 3ch, The number of UART channel is extensible up to 6ch, The data width in the external bus interface is extensible to 32 bit