RENESAS HI9P-0508-9

The HI-506/HI-507 and HI-508/HI-509 monolithic CMOS multiplexers each include an array of sixteen and eight analog switches respectively, a digital decoder circuit for channel selection, voltage reference for logic thresholds, and an enable input for device selection when several multiplexers are present. The Dielectric Isolation (DI) process used in fabrication of these devices eliminates the problem of latchup. DI also offers much lower substrate leakage and parasitic capacitance than conventional junction isolated CMOS. The switching threshold for each digital input is established by an internal +5V reference, providing a guaranteed minimum 2.4V for logic “1” and maximum 0.8V for logic “0”. This allows direct interface without pullup resistors to signals from most logic families: CMOS, TTL, DTL and some PMOS. For protection against transient overvoltage, the digital inputs include a series 200Ω resistor and diode clamp to each supply. If input overvoltages are present, the HI-546/HI-547/HI-548/ HI-549 multiplexers are recommended.

• Pb-Free Available (RoHS Compliant)
• Low ON Resistance ... 180Ω
• Wide Analog Signal Range ... ±15V
• TTL/CMOS Compatible
• Access Time ... 250ns
• Maximum Power Supply ... 44V
• Break-Before-Make Switching
• No Latch-Up
• Replaces DG506A/DG506AA and DG507A/DG507AA
• Replaces DG508A/DG508AA and DG509A/DG509AA

• Data Acquisition Systems
• Precision Instrumentation
• Demultiplexing
• Selector Switch