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MXIC MX25L6473FM2I-08GTR product image
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MXIC MX25L6473FM2I-08GTR

제조업체
제조사 품번
MX25L6473FM2I-08GTR
LCSC 번호
C2802801
포장
SOP-8
고객 번호
주요 제원
64Mbit 2.65V~3.6V 133MHz SPI SOP-8 Memory RoHS
데이터시트MXIC MX25L6473FM2I-08GTR
대체 부품5
모든 주문 보장
100% 정품 · 30일 반품 또는 교환
품절
재입고 알림
최소값: 1배수: 1판매 단위: Piece
BOM 목록에 추가
수량단가(참고용)총액
1+$ 2.299$ 2.30
200+$ 0.8895$ 177.90
500+$ 0.8594$ 429.70
1,000+$ 0.8435$ 843.50
표준 패키지2000/Full Reel
수량이 많을수록 더 좋은 가격?
$

제품 사양

전체
타입설명
카테고리Integrated Circuits (ICs)/Memory/Memory
제조업체MXIC
포장SOP-8
Operating Temperature-40℃~+85℃
FeaturesWrite enable latch;Software write protection;Absolute write protection
Memory Size64Mbit
Voltage - Supply2.65V~3.6V
Program / Erase Cycles100,000 cycles
Clock Frequency133MHz
Data Retention - TDR (Year)20 Years
Block Erase Time(tBE)500ms@(64KB)
Write Cycle Time(tWC)-
Page Programming Time (Tpp)1.2ms
InterfaceSPI
Standby Supply Current5uA
도움말 및 피드백유사 제품 보기 (0) >

개요

AI 번역

The MX25L6473F is a 64Mb serial flash memory internally organized as 8,388,608 x 8. In quad I/O mode, the organization becomes 16,777,216 bits x 4. In dual I/O mode, the organization becomes 33,554,432 bits x 2. The MX25L6473F features an SPI and software protocol that allow it to operate on a simple 3-wire bus in single I/O mode.

주요 특징

AI 번역
  • Multiple I/O interface support - Single I/O, Dual I/O, and Quad I/O
  • Auto-erase and auto-program algorithms
  • Program Suspend/Resume and Erase Suspend/Resume
  • Permanently fixed QE bit, QE=1; Quad I/O mode enabled
  • SPI support - Mode 0 and Mode 3
  • 67,108,864 x 1-bit organization, or 33,554,432 x 2-bit organization, or 16,777,216 x 4-bit organization
  • 2048 uniform sectors, 4K bytes each - individually erasable
  • 256 uniform blocks, 32K bytes each - individually erasable
  • 128 uniform blocks, 64K bytes each - individually erasable
  • Supply voltage operating range: 2.65~3.6V for read, erase, and program operations
  • Latch-up protection up to 100mA, from -1V to VCC +1V
  • High performance: VCC = 2.65~3.6V
  • Normal read frequency: 50MHz
  • Fast read: FAST_READ, DREAD, QREAD support 133MHz (8 dummy cycles required)
  • 2READ supports 80MHz (4 dummy cycles) or 133MHz (8 dummy cycles)
  • 4READ supports 80MHz (6 dummy cycles) or 133MHz (10 dummy cycles)
  • Configurable dummy cycle count for 2READ and 4READ operations
  • 8/16/32/64-byte wrap-around burst read mode
  • Low power consumption
  • Typical erase/program endurance: 100,000 cycles
  • Data retention: 20 years
  • Input data format: 1-byte command code
  • Advanced security features: BP0-BP3 block group protection
  • Additional 8K-bit security OTP
  • Device identifier support
  • Factory-lockable identification, customer-lockable
  • Auto-erase and auto-program algorithms: automatically erase and verify data in selected sector; automatically program and verify data in selected page via internal algorithm with automatic program pulse width timing
  • Status register features
  • Command reset
  • Program/Erase Suspend
  • Program/Erase Resume
  • Electronic identification: JEDEC 1-byte manufacturer ID and 2-byte device ID; RES command for reading 1-byte device ID
  • Serial Flash Discoverable Parameters (SFDP) mode support
  • SCLK input - serial clock input
  • SI/SIO0 - serial data input, or serial data I/O for 2×I/O mode, or serial data I/O for 4×I/O mode
  • SO/SIO1 - serial data output, or serial data I/O for 2×I/O mode, or serial data I/O for 4×I/O mode
  • SIO2 - serial data I/O for 4×I/O mode
  • SIO3 - serial data I/O for 4×I/O mode
  • Package: 8-pin SOP; 8-WSON
  • All devices RoHS compliant and halogen-free

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