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Modelli EDAEasyEDA
MICROCHIP KSZ9897STXI
| Produttore | |
| Cod. Prod. | KSZ9897STXI |
| Cod. LCSC | C638301 |
| Imballo | TQFP-128(14x14) |
| Numero Cliente | |
| Attr. chiave | 7-Port Gigabit Ethernet Switch with Two RGMII/MII/RMII Interfaces |
| Scheda Tecnica | MICROCHIP KSZ9897STXI |
| Conformità RoHS | 2 documenti disponibili |
Specifiche del Prodotto
Tutto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Interface/Controllers | |
| Produttore | MICROCHIP | |
| Imballo | TQFP-128(14x14) | |
| Features | Automatic polarity correction;Echo cancellation;Noise suppression;Remote fault detection;Port independent power-down |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Interface/Controllers | |
| Produttore | MICROCHIP |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | TQFP-128(14x14) | |
| Features | Automatic polarity correction;Echo cancellation;Noise suppression;Remote fault detection;Port independent power-down |
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Caratteristiche
Traduzione AI
- Switch Management Capabilities
- 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters
- Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 256kByte frame buffer
- Jumbo packet support up to 9000 bytes
- Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port
- MIB counters for fully-compliant statistics gathering 34 counters per port
- Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority
- Loopback modes for remote failure diagnostics
- Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery
- Multiple spanning tree protocol (MSTP) support
- Five Integrated PHY Ports
- 1000BASE-T/100BASE-TX/10BASE-Te IEEE 802.3
- Fast Link-up option significantly reduces link-up time
- Auto-negotiation and Auto-MDI/MDI-X support
- On-chip termination resistors and internal biasing for differential pairs to reduce power
- LinkMD cable diagnostic capabilities for determining cable opens, shorts, and length
- Two Configurable External MAC Ports
- Reduced Gigabit Media Independent Interface (RGMII) v2.0
- Reduced Media Independent Interface (RMII) v1.2 with 50MHz reference clock input/output option
- Media Independent Interface (MII) in PHY/MAC mode
- Advanced Switch Capabilities
- IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs
- IEEE 802.1p/q tag insertion/removal on per port basis
- VLAN ID on per port or VLAN basis
- IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control
- IEEE 802.1X access control (Port-based and MAC address based)
- IGMP v1/v2/v3 snooping for multicast packet filtering
- IPv6 multicast listener discovery (MLD) snooping
- IPv4/IPv6 QoS support, QoS/CoS packet prioritization
- 802.1p QoS packet classification with 4 priority queues
- Programmable rate limiting at ingress/egress ports
- Broadcast storm protection
- Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class
- MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
- Self-address filtering for implementing ring topologies
- Comprehensive Configuration Registers Access
- High-speed 4-wire SPI (up to 50MHz), I2C interfaces provide access to all internal registers
- MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers
- In-band management via any of the data ports
- I/O pin strapping facility to set certain register bits from I/O pins at reset time
- On-the-fly configurable control registers
- Power Management
- Energy detect power-down mode on cable disconnect
- Dynamic clock tree control
- Unused ports can be individually powered down
- Full-chip software power-down
- Wake-on-LAN (WoL) standby power mode with PME interrupt output for system wake upon triggered events
Applicazioni
Traduzione AI
- Stand-alone 10/100/1000Mbps Ethernet switches
- VoIP infrastructure switches
- Broadband gateways/firewalls
- Wi-Fi access points
- Integrated DSL/cable modems
- Security/surveillance systems
- Industrial control/automation switches
- Networked measurement and control systems
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100% Autentico · Reso o Sostituzione entro 30 Giorni
Disponibile: 49
49 Pronta consegna
Minimo: 1Multiplo: 1Unità di vendita: Piece
Aggiungi alla Lista BOM
| Qtà | Pr. unit. | Importo totale |
|---|---|---|
| 1+ | $ 15.8037 | $ 15.80 |
| 10+ | $ 15.0055 | $ 150.06 |
| 30+ | $ 13.6258 | $ 408.77 |
| 100+ | $ 12.4219 | $ 1242.19 |
Package Standard90/Full Tray | ||
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Specifiche del Prodotto
Tutto
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Interface/Controllers | |
| Produttore | MICROCHIP | |
| Imballo | TQFP-128(14x14) | |
| Features | Automatic polarity correction;Echo cancellation;Noise suppression;Remote fault detection;Port independent power-down |
| Tipo | Descrizione | |
|---|---|---|
| Categoria | Integrated Circuits (ICs)/Interface/Controllers | |
| Produttore | MICROCHIP |
| Tipo | Descrizione | |
|---|---|---|
| Imballo | TQFP-128(14x14) | |
| Features | Automatic polarity correction;Echo cancellation;Noise suppression;Remote fault detection;Port independent power-down |
Aiuto & FeedbackMostra prodotti simili (0) >
Caratteristiche
Traduzione AI
- Switch Management Capabilities
- 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters
- Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 256kByte frame buffer
- Jumbo packet support up to 9000 bytes
- Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port
- MIB counters for fully-compliant statistics gathering 34 counters per port
- Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority
- Loopback modes for remote failure diagnostics
- Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery
- Multiple spanning tree protocol (MSTP) support
- Five Integrated PHY Ports
- 1000BASE-T/100BASE-TX/10BASE-Te IEEE 802.3
- Fast Link-up option significantly reduces link-up time
- Auto-negotiation and Auto-MDI/MDI-X support
- On-chip termination resistors and internal biasing for differential pairs to reduce power
- LinkMD cable diagnostic capabilities for determining cable opens, shorts, and length
- Two Configurable External MAC Ports
- Reduced Gigabit Media Independent Interface (RGMII) v2.0
- Reduced Media Independent Interface (RMII) v1.2 with 50MHz reference clock input/output option
- Media Independent Interface (MII) in PHY/MAC mode
- Advanced Switch Capabilities
- IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs
- IEEE 802.1p/q tag insertion/removal on per port basis
- VLAN ID on per port or VLAN basis
- IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control
- IEEE 802.1X access control (Port-based and MAC address based)
- IGMP v1/v2/v3 snooping for multicast packet filtering
- IPv6 multicast listener discovery (MLD) snooping
- IPv4/IPv6 QoS support, QoS/CoS packet prioritization
- 802.1p QoS packet classification with 4 priority queues
- Programmable rate limiting at ingress/egress ports
- Broadcast storm protection
- Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class
- MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
- Self-address filtering for implementing ring topologies
- Comprehensive Configuration Registers Access
- High-speed 4-wire SPI (up to 50MHz), I2C interfaces provide access to all internal registers
- MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers
- In-band management via any of the data ports
- I/O pin strapping facility to set certain register bits from I/O pins at reset time
- On-the-fly configurable control registers
- Power Management
- Energy detect power-down mode on cable disconnect
- Dynamic clock tree control
- Unused ports can be individually powered down
- Full-chip software power-down
- Wake-on-LAN (WoL) standby power mode with PME interrupt output for system wake upon triggered events
Applicazioni
Traduzione AI
- Stand-alone 10/100/1000Mbps Ethernet switches
- VoIP infrastructure switches
- Broadband gateways/firewalls
- Wi-Fi access points
- Integrated DSL/cable modems
- Security/surveillance systems
- Industrial control/automation switches
- Networked measurement and control systems
C638301 Libreria EasyEDA
Conformità & Codici di Esportazione
| Tipo | Dettagli |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A991B1 |
| CNHTS | 517622990 |
| USHTS | |
| TARIC | |
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS |
| Tipo | Dettagli |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A991B1 |
| CNHTS | 517622990 |
| USHTS | |
| TARIC |
| Tipo | Dettagli |
|---|---|
| CAHTS | |
| BRHTS | |
| INHTS | |
| MXHTS | |