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Infineon S26HS512TGABHB013

Producent
Infineon
Nr części prod.
S26HS512TGABHB013
Nr LCSC
C5745953
Opak.
FBGA-24(8x8)
Numer Klienta
Klucz. cechy
512Mbit 1.7V~2V 200MHz SPI FBGA-24(8x8) Memory RoHS
Karta KatalogowaInfineon S26HS512TGABHB013
Zgodność z RoHS1 dokumentów dostępnych
Części alternatywne2
Gwarancja na każde zamówienie
100% Oryginalne · Zwrot lub Wymiana w ciągu 30 Dni

Specyfikacje Produktu

Wszystko
TypOpis
KategoriaIntegrated Circuits (ICs)/Memory/Memory
ProducentInfineon
Opak.FBGA-24(8x8)
Operating Temperature-40℃~+105℃
FeaturesPower-on reset;ECC error correction;Hardware Write Protection;Absolute Write Protection
Memory Size512Mbit
Voltage - Supply1.7V~2V
Program / Erase Cycles1,280,000 Cycles
Clock Frequency200MHz
Data Retention - TDR (Year)25 Years
Block Erase Time(tBE)-
Write Cycle Time(tWC)-
Page Programming Time (Tpp)1.7ms
Standby Supply Current0.011mA
InterfaceSPI
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Funkcje

Tłumaczenie AI
  • 45 nm storage technology, two bits of data per memory array cell
  • Uniform and hybrid sector architecture options; hybrid architecture includes a specific number of 4 KB and 256 KB sectors
  • 256- or 512-byte page program buffer
  • 1024-byte (32×32 bytes) one-time programmable security silicon region
  • JEDEC extended SPI compliant interface with high-speed DDR mode (up to 400 MBps) and legacy SPI mode (up to 21 MBps)
  • Default boot from legacy SPI or HYPERBUS interface
  • Functional safety compliant with ISO 26262, ASIL B rated with ASIL D capable
  • High endurance and long data retention partition
  • Interface CRC for detecting communication errors between host controller and device
  • Data integrity CRC for detecting errors in the memory array
  • Boot failure reporting, configuration corruption detection, and recovery options
  • Built-in ECC for single-bit error correction and double-bit error detection in memory array data
  • Sector erase status indication for power loss during erase operation
  • Protection based on individual memory array sectors
  • Immediate memory array access after power-up
  • Hardware reset via CS# signal method and dedicated RESET# pin
  • Serial Flash Discoverable Parameters describing device capabilities and features
  • 256 Mb device main array minimum program/erase cycles: 640,000
  • 512 Mb device main array minimum program/erase cycles: 1,280,000
  • 1 Gb device main array minimum program/erase cycles: 2,560,000
  • All devices 4 KB sector minimum program/erase cycles: 300,000
  • Minimum data retention for all devices: 25 years
  • Supply voltage: 1.7 V to 2.0 V (HS-T) or 2.7 V to 3.6 V (HL-T)
  • Multiple industrial and automotive temperature ranges from -40°C to +125°C
  • 256 Mb and 512 Mb devices: 24-ball BGA, 6×8 mm
  • 1 Gb device: 24-ball BGA, 8×8 mm