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Nexperia 74LVC32AD,118

Produttore
Cod. Prod.
74LVC32AD,118
Cod. LCSC
C548708
Imballo
SOP-14
Numero Cliente
Attr. chiave
Quad 2-input OR gate
Scheda TecnicaNexperia 74LVC32AD,118
Conformità RoHS2 documenti disponibili
Parti alternative2
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Specifiche del Prodotto

Tutto
TipoDescrizione
CategoriaIntegrated Circuits (ICs)/Logic/Gates and Inverters
ProduttoreNexperia
ImballoSOP-14
output type-
Input TypeSchmitt trigger
Logic Family74LVC Series
Voltage - Supply1.2V~3.6V
Output Logic Level - Low200mV;400mV;450mV;550mV;600mV;800mV
Propagation Delay3.8ns@3.3V,50pF
FeaturesOvervoltage-tolerant input
Input Logic Level - Low700mV~800mV
Operating Temperature-40℃~+125℃
Input Logic Level - High1.7V~2V
Output Logic Level - High1.2V;1.8V;2.2V;2.4V
Quiescent Current(Iq)40uA
Current - Output High(IOH)24mA
Number of Channels4;2
Current - Output Low(IOL)24mA

Descrizione

Traduzione AI

The 74LVC32A is a quad 2-input OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

Caratteristiche

Traduzione AI
  • Wide supply voltage range from 1.2 V to 3.6 V
  • Overvoltage tolerant inputs to 5.5 V
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V), JESD8-5A (2.3 V to 2.7 V), JESD8-C/JESD36 (2.7 V to 3.6 V)
  • ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V; CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applicazioni

Traduzione AI
  • Level translation in mixed 3.3V and 5V environments