ST STM32U375CET6Q

This is an ultra-low-power Arm® Cortex®-M33 32-bit MCU with TrustZone® and FPU, delivering 395 CoreMark® performance, featuring 1MB Flash, 256KB SRAM, and SMPS. The STM32U375xx devices belong to the ultra-low-power microcontroller family (STM32U3 series), based on the high-performance Arm® Cortex®-M33 32-bit RISC core operating at up to 96MHz. The Cortex®-M33 core includes a single-precision FPU supporting all Arm® single-precision data processing instructions and all data types, along with a full set of DSP instructions and an MPU for enhanced application security. The STM32U3 series leverages near-threshold voltage technology to significantly extend battery life by reducing active-mode power consumption to 10μA/MHz, dramatically prolonging battery runtime for applications. The devices integrate high-speed embedded memory (up to 1MB Flash and 256KB SRAM) and an Octo/Quad-SPI Flash interface.

• Package types: LQFP48 (7×7mm), LQFP64 (10×10mm), LQFP100 (14×14mm), UFQFPN32 (5×5mm), UFQFPN48 (7×7mm), UFBGA64 (5×5mm), UFBGA100 (7×7mm), WLCSP52, WLCSP68 (3.17×3.11mm)
• Ultra-low power: supply voltage 1.71V to 3.6V; operating temperature -40℃ to +105℃; VBAT mode powering RTC and 32×32-bit backup registers; Stop3 mode (8KB SRAM) 1.6μA, Stop3 mode (full SRAM) 2.2μA; Stop2 mode (8KB SRAM) 3.8μA, Stop2 mode (full SRAM) 4.5μA; Run mode (3.3V, While(1) SMPS buck converter) 9.5μA/MHz; Run mode (3.3V/48MHz, CoreMark® SMPS buck converter) 13μA/MHz; Run mode (3.3V/96MHz, CoreMark® SMPS buck converter) 16μA/MHz; BOR supported in all modes except Shutdown
• Core and accelerators: Arm® 32-bit Cortex®-M33 CPU with TrustZone® and FPU; ART accelerator with 8KB instruction cache, 0-wait-state execution from Flash and external memory, up to 96MHz, MPU, 144 DMIPS, and DSP instructions
• Power management: integrated LDO and SMPS buck converter with dynamic switching and voltage scaling
• Benchmarks: 395.4 CoreMark® (4.12 CoreMark®/MHz), 500 ULPMark™-CP, 117 ULPMark™-CM, 202000 SecureMark™-TLS
• Memory: up to 1MB Flash with ECC (2 banks with simultaneous read/write); 256KB SRAM (including 64KB SRAM with hardware parity); OCTOSPI external memory interface supporting SRAM, PSRAM, NOR, NAND, and FRAM
• Security: Arm® TrustZone® with secure-accessible I/Os, memory, and peripherals; flexible lifecycle scheme (RDP and password-protected debug); root of trust based on boot entry and secure HDP area; Secure Firmware Install (SFI) via embedded Root Security Services (RSS); secure firmware upgrade; Cortex®-M Trusted Firmware (TF-M) support; public key accelerator, ECDSA signature verification; hardware key protection; attestation key; HASH hardware accelerator; TRNG (NIST SP800-90B compliant); 96-bit UID; 512-byte OTP; anti-tamper protection
• Clock management: 4 to 50MHz crystal oscillator; 32.768kHz RTC crystal oscillator (LSE); internal 16MHz factory-trimmed RC (±1%); internal low-power RC (32kHz or 250Hz, ±5%); 2 internal multi-speed oscillators 3MHz to 96MHz; internal 48MHz with clock recovery; precise MSI up to 96MHz in PLL mode (with 32.768kHz, 16MHz, or 32MHz crystal oscillator)
• General-purpose I/Os: up to 82 fast I/Os (interrupt-capable, most 5V-tolerant), up to 14 independently supplied I/Os (down to 1.08V)
• Timers and watchdogs: 1×16-bit advanced motor control timer, 3×32-bit general-purpose timers, 3×16-bit general-purpose timers, 2×16-bit basic timers, 4×16-bit low-power timers (available in Stop mode), 2 watchdogs, 2 SysTick timers; RTC with hardware calendar, alarms, and calibration
• Communication peripherals: up to 19 communication peripherals including 1 USB 2.0 full-speed controller, 1 SAI, 3×I2C FM+ (1Mbit/s, SMBus/PMBus™), 2×I3C (SDR, I2C FM+ mode), 2×USART and 2×UART (SPI, ISO7816, LIN, IrDA, modem), 1×LPUART, 3×SPI (6 SPIs total including 1 from OCTOSPI and 2 from USART), 1×CAN FD controller, 1×SDMMC interface, 1×audio digital filter with sound activity detection
• DMA controller: 12-channel GPDMA, available in Sleep and Stop modes (up to Stop2)
• Capacitive sensing: up to 21 capacitive sensing channels supporting touch keys, linear and rotary touch sensors
• Analog peripherals: 2×12-bit ADC (2.5Msps, hardware oversampling); 12-bit DAC (2 D/A converters, low-power sample-and-hold, autonomous operation in Stop1 mode); 2×op-amps with built-in PGA; 2×ultra-low-power comparators
• CRC calculation unit
• Debug support: SWD, JTAG, Embedded Trace Macrocell™ (ETM)
• Package compliance: all packages ECOPACK2 compliant