HTCSEMI HT651224BRSZ

designed to transmit and receive serial data over FR- 4 PCB backplanes, balanced copper cables and unshielded twisted pair. The HT651023B transforms 10- bit wide word into a single high speed LVDS serial data stream with embedded clock. On the other hand, The HT651224B receives the serial data stream and transforms it back into a 10- bit wide parallel word and recovers parallel clock. With HTCSEMI high performance architecture, the chipset can transmit and receive wide- range word rates from 10MHz to 90MHz. Including overhead, this translates into a serial data rate between 100- Mbps and 900- Mbps payload encoded throughput. A synchronization mode is available to establish the link between chipset upon power up, while chipset internally generates SYNC patterns or the HT651224B can be allowed to synchronize to random data. By using the synchronization mode, the chipset links within specified short time. When no data link is required, the chipset can be set into power- down mode. Alternatively, a mode is available to place the output pins in the high- impedance state without losing PLL lock.

• 100MBPS TO 900 - MBPS - SERIALIZER/DESERIA - LIZER
• LOCK INDICATION AND - SYNCHRONIZATION MODE FOR FASTER - LOCK
• NO EXTERNAL COMPONENTS REQUIRED FOR PLL
• PROGRAMMABLE EDGE TRIGGER ON CLOCK
• CHIPSET POWER CONSUMPTION > 500 - mW (TYP) AT 90MHz
• INDUSTRIAL TEMPERATURE RANGE
• HIGH ESD CAPABILITY (4000V HBM)
• 28 - PIN SSOP PB - FREE PACKAGE

• BACKPLANE INTERCONNECT
• WIRELESS BASE STATION
• FIBER OPTIC TRANSCERVER