TI SN65MLVD047PW
| 제조업체 | |
| 제조사 품번 | SN65MLVD047PW |
| LCSC 번호 | C1544394 |
| 포장 | TSSOP-16 |
| 고객 번호 | |
| 주요 제원 | MULTIPOINT-LVDS QUAD DIFFERENTIAL LINE DRIVER |
| 데이터시트 | TI SN65MLVD047PW |
| RoHS 준수 | 1개 문서 이용 가능 |
| 대체 부품 | 3 |
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | TSSOP-16 | |
| Type | Buffer;Multiplexer | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 200Mbps | |
| Operating Temperature | -40℃~+85℃ | |
| Number of Drivers | 4 | |
| Level Standard | LVDS | |
| Features | Edge rate control | |
| Number of Receivers | 0 |
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | TSSOP-16 | |
| Type | Buffer;Multiplexer | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 200Mbps |
| 타입 | 설명 | |
|---|---|---|
| Operating Temperature | -40℃~+85℃ | |
| Number of Drivers | 4 | |
| Level Standard | LVDS | |
| Features | Edge rate control | |
| Number of Receivers | 0 |
개요
The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30Ω due to the bus terminations, as well as the capacitive load of bus interface devices. SN65MLVD047 drivers allow for operation with loads as low as 30Ω. The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-kV ESD protection on all bus pins.
주요 특징
- Differential Line Drivers for 30 - Ω to 55 - Ω Loads and Data Rates Up to 200 Mbps, Clock Frequencies up to 100 MHz
- Supports Multipoint Bus Architectures
- Operates from a Single 3.3 - V Supply
- Characterized for Operation from - 40°C to 85°C
- 16 - Pin SOIC (JEDEC MS - 012) and 16 - Pin TSSOP (JEDEC MS - 153) Packaging
응용 분야
- Clock Distribution
- Backplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer Systems
- Cellular Base Stations
- Central - Office and PBX Switching
- Bridges and Routers
- Low - Power High - Speed Short - Reach Alternative to TIA/EIA - 485
제품 사양
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | TSSOP-16 | |
| Type | Buffer;Multiplexer | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 200Mbps | |
| Operating Temperature | -40℃~+85℃ | |
| Number of Drivers | 4 | |
| Level Standard | LVDS | |
| Features | Edge rate control | |
| Number of Receivers | 0 |
| 타입 | 설명 | |
|---|---|---|
| 카테고리 | Integrated Circuits (ICs)/Interface/Drivers, Receivers, Transceivers | |
| 제조업체 | TI | |
| 포장 | TSSOP-16 | |
| Type | Buffer;Multiplexer | |
| Voltage - Supply | 3V~3.6V | |
| Data Rate | 200Mbps |
| 타입 | 설명 | |
|---|---|---|
| Operating Temperature | -40℃~+85℃ | |
| Number of Drivers | 4 | |
| Level Standard | LVDS | |
| Features | Edge rate control | |
| Number of Receivers | 0 |
개요
The SN65MLVD047 is a quadruple line driver. The output current of this device has been increased, in comparison to standard LVDS compliant devices, in order to support doubly terminated transmission lines and heavily loaded backplane bus applications. Backplane applications generally require impedance matching termination resistors at both ends of the bus. The effective impedance of a doubly terminated bus can be as low as 30Ω due to the bus terminations, as well as the capacitive load of bus interface devices. SN65MLVD047 drivers allow for operation with loads as low as 30Ω. The SN65MLVD047 devices allow for multiple drivers to be present on a single bus. Driver edge rate control is incorporated to support operation. The SN65MLVD047 provides 9-kV ESD protection on all bus pins.
주요 특징
- Differential Line Drivers for 30 - Ω to 55 - Ω Loads and Data Rates Up to 200 Mbps, Clock Frequencies up to 100 MHz
- Supports Multipoint Bus Architectures
- Operates from a Single 3.3 - V Supply
- Characterized for Operation from - 40°C to 85°C
- 16 - Pin SOIC (JEDEC MS - 012) and 16 - Pin TSSOP (JEDEC MS - 153) Packaging
응용 분야
- Clock Distribution
- Backplane or Cabled Multipoint Data Transmission in Telecommunications, Automotive, Industrial, and Other Computer Systems
- Cellular Base Stations
- Central - Office and PBX Switching
- Bridges and Routers
- Low - Power High - Speed Short - Reach Alternative to TIA/EIA - 485
C1544394 EasyEDA 라이브러리
컴플라이언스 & 수출 코드
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A991B1 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |
| 타입 | 세부사항 |
|---|---|
| RoHS | ROHS3 Compliant |
| ECCN | 5A991B1 |
| CNHTS | 8542399000 |
| USHTS | 8542390001 |
| TARIC | 8542399000 |
| 타입 | 세부사항 |
|---|---|
| CAHTS | 8542390000 |
| BRHTS | 85423999 |
| INHTS | 85423900 |
| MXHTS | 8542.39.99 |



